抱歉,弟無意冒犯貓大提供的 solution,我認爲樹莓派DAC無論怎麼樣都無法與隔離式非同步USB DAC作比較。
弟所探討的應該是樹莓派跟其他電腦方案的比較。礙於小弟對音響這一領域很陌生,理解上不完整,非常感謝貓大不吝指教!
弟僅就前述文章的爬文心得茲請貓大能繼續惠賜寶貴意見,感恩先!
首先,作者本人認爲數位音響的傳輸領域(尤其導線)非常深奧,非常人能輕鬆解釋清楚。
Now the big question: how much a digital interconnect can influence the sound of transport + dac couple? IMHO I can just say that the influence of digital cables on sound is far, far heavier than anyone could expect!
然後作者指出造成問題的時間發生於兩個時間點:錄製時與重建時,但一般只能從後者進行抑制。
It is clear that the problem is two-folds: part of the error is generated at recording time, while another part added at reproduction time.
...
All we can do is to try to minimize the amount of error added at reproduction time.
然後指出對於數位音響的主要干擾是 sampling jitter:
All these timing errors, taking place both at recording and reproduction (D/A and A/D conversion) time, are called sampling jitter.
Sample clock jitter is the only kind of jitter that really directly affects digital audio, or better, digital audio listening. In audio systems can be recognized many other different types of jitter, and we will discuss about them in the following, but only because they can finally induce sample clock jitter.
其中 interface jitter 會是 sampling jitter 的首要要來源:
A rather technical classification of jitter in digital audio ([1]) draws before all a distinction between interface jitter and sampling jitter.
作者再進一步歸納出 interface jitter 的類別主要有三類型:
Typical components of interface jitter are transmitter jitter, line induced jitter and interfering-noise induced jitter.
無論哪種界面方式,transmitter jitter 都難以避免,但是後兩者則會在導線傳輸過程中很容易遇到:
因此,小弟會認爲經過的導線越少、經過的路徑越少、那 jitter 相對也會越少。故此得出 I2S 界面比 USB 界面在 jitter 上會爲改善。
或許在貓大看來這樣的認知非常粗淺,這小弟亦有自知就是了。只是,對於不熟悉的領域,除了多爬文之外也很希望前輩能提點一二,從錯誤中學習。
接下來小弟會花時間學習 clock 相關的知識,還是希望能得到貓大的指引。感謝!